Digital Circuits, Mixed Signal and Applications II

September 1st – 16:40pm – 19:00pm
Room: TBD
Chair: Gilson Wirth
  • 17:20h: Cluster-based Architecture Relying on Optical Integrated Networks with the Provision of a Low-latency Arbiter
    • Felipe de Magalhães, Fabiano Hessel, Odile Liboiron-Ladouceur and Gabriela Nicolescu

  • 17:40h: New Asynchronous Protocols for Enhancing Area and Throughput in Bundled-Data Pipelines
    • Jean Simatic, Rodrigo Possamai Bastos, Abdelkarim Cherkaoui and Laurent Fesquet

  • 18:00h: Software-Defined Radio Design based on GALS Architecture for FPGAs
    • Eduardo Lussari, Duarte Oliveira, Lester Faria and Orlando Verducci

  • 18:20h: Design and Analysis of the HF-RISC Processor Targeting Voltage Scaling Applications
    • Felipe Bortolon, Matheus Gibiluka, Sergio Johann, Sergio Bampi, Ney Laert Vilar Calazans, Fabiano Passuelo Hessel and Matheus Moreira

  • 18:40h: An Offset Reduction Technique for Dynamic Voltage Comparators
    • Andres Amaya, Rodolfo Villamizar and Elkim Roa